Engineers have taken a significant step toward denser, more capable silicon chips. Researchers at the University of Illinois Urbana-Champaign have demonstrated a practical method for building monolithic three-dimensional integrated circuits from ultrathin single-crystalline silicon layers. Their process keeps temperatures low enough to protect existing circuitry, solving a long-standing barrier in vertical chip scaling.
The work rests on a roll-transfer-printing technique that places nanomembranes roughly 10 nanometres thick. Fabrication of each additional layer occurs at no more than 400 degrees Celsius and sometimes as low as 200 degrees Celsius. That range sits comfortably inside the thermal budget that completed lower layers can tolerate.
For the first time, we have met the thermal budget of monolithic 3D integration using standard single-crystalline silicon and delivered unprecedented performance.
Qing Cao, associate professor of materials science and engineering at the University of Illinois Urbana-Champaign, described the result in those terms. The team built structures with up to three stacked layers of complementary junctionless transistors. Each layer holds 625 transistors whose performance comes close to that of conventional front-end-of-line silicon devices, reaching current densities above 650 microamperes per micrometre.
Vertical connections between tiers achieve alignment accuracy better than 10 nanometres. This precision supports the construction of working logic gates, inverters, NAND and NOR circuits, and even static random-access memory cells that span multiple layers. The three-dimensional layout shrinks the circuit footprint by as much as a factor of three compared with an equivalent two-dimensional design. Yields remain high, between 98 and 100 percent.
Previous attempts at monolithic 3D silicon integration struggled with temperature demands that often exceeded 1,000 degrees Celsius for high-quality crystal growth. Such heat would destroy metal interconnects already in place. Earlier alternatives turned to polycrystalline silicon, metal oxides, carbon nanotubes or two-dimensional materials, none of which matched the speed and efficiency of standard single-crystal silicon transistors.
By contrast the Illinois approach uses genuine single-crystal silicon throughout. Cao underlined the practical advantage. Demonstrating that silicon can do the job means this technology can plug directly into existing manufacturing ecosystems, which dramatically accelerates its path toward real impact.
